高级版图设计师Senior Layout Designer

lightelligence

Senior Layout Designer

What you’ll do at Lightelligence:
• Senior layout designer to work with analog design engineers to perform layout for high speed, high performance analog/mixed signal circuits (ADC, SERDES, etc.) at the block and full chip level in advanced Foundry CMOS process
• Work closely with design lead and physical designers for top level floor planning and integration of analog IPs with the SOC system
• Establish the layout procedures and best practices within the company while helping to build up the layout team

Preferred Qualifications:
• 10+ years’ experience in high performance analog layout in advanced CMOS process (28nm or smaller geometry CMOS, deep metal stack, high frequency design >1 GHz)
• Experience with layout of high-performance analog IP blocks such as PLL, DLL, SERDES, ADC, DAC, Amplifier, etc. highly desired
• Thorough knowledge with industry standard EDA tools such as Cadence Virtuoso; extensive experience with DRC, LVS tools and debug verification process
• Experience with floor planning, block level routing and top level chip assembly
• Knowledge of high performance analog layout techniques such as common centroid layout, shielding, use of dummy devices
• Experienced in robust power/signal routing and EM analysis
• Strong communicator, works well independently and in team situations
• Experience in working with distributed design teams a plus

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