RTL Design Engineer

 

RTL Design Engineer

Role Description:

  1. Perform block-level and SoC-level micro-architecture design, documentation and RTL coding
  2. Datapath, control and chip-global features such as power management, clock-domain-crossings, reset, initialization, and DFx (Design for Test, Debug, Manufacturing, Yield, etc)
  3. Collaborate with other members of the design and verification teams as well as other disciplines in the company.

Preferred Qualifications:

  1. BS or MS in a relevant discipline such as Electrical Engineering and at least 3-5 years experience
  2. Experience delivering RTL modules in Verilog and System Verilog
  3. Scripting and experience with industry-standard design automation tools
  4. Experience with industry standard EDA tools
  5. Track record of successful tapeouts of ASICs of significant scope (size, frequency, power)
  6. Basic knowledge of Deep Neural Networks and Artificial Intelligence a plus
  7. Willingness to learn new skills and do the work necessary to succeed.
  8. Business-level fluency in English
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